Ethernet on FPGA

Logic Development has an “easy to use” Ethernet MAC solution which makes Ethernet on FPGA. Features of the Ethernet MAC:

• Supports 10/100 Mbit
• Half/full duplex
• Attached to PHY over standard MII interface
• Has MII control interface to access control/status registers of PHY
• Interfacing to MicroBlaze buses
• Interfacing to other busses (external or internal) easy adaptable
• Generic DMA interface with buffering of 64 transmit and 64 receive packets. Making low requirements of software/driver latency.
• DMA possible to interface to SDRAM controller using burst mode to SDRAM.

See more details on X-fest presentation: X-Fest 2005 OpenCore Ethernet with Microblaze

Examples of applications and target device utilization:

Example: MicroBlaze with Ethernet and external SDRAM/Flash

Features:

• MicroBlaze with 8+8kbyte cache and MDM
• Combined SDRAM and asynchronous Flash controller multiplexed on same IO’s
• Ethernet MAC with direct DMA to SDRAM (64 TX and 64 RX packet)
• UART with direct DMA to SDRAM
• Flash to SDRAM software boot loader and misc. timers

Block diagram:

Target device	Xilinx Spartan 3, XC3S400
Device utilization	73%
LUT4	4253
FF	2148
BRAM	12

Example: CPU free Ethernet node

Features:

• No CPU – No software
• No external memory.
• Packet buffer with 2 packets TX and RX buffer

With this example it is possible to make “simple” Ethernet nodes. Can for example be used for control or data acquisition over Ethernet:

Target device	Xilinx Spartan 3, XC3S50 (The smallest Spartan 3)
Device utilization	87%
LUT4	1051
FF	466
BRAM	4